RISC-V: Difference between revisions

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-{{Expansion}}
+{{Expansion}}<!-- TODO: write preface -->
-<!-- TODO: write preface -->
 == Supported devices ==
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 It is possible to emulate a RISC-V platform with QEMU. Programs may occasionally crash on QEMU with a segmentation fault despite working on native RISC-V hardware.<ref>[https://github.com/NixOS/nixpkgs/issues/300550 Nixpkgs #300550]</ref><ref>[https://github.com/NixOS/nixpkgs/issues/300618 Nixpkgs #300618]</ref>
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 == Binary cache ==
+Example configuration snippet which can be used to add two third-party binary caches with RISCV support<syntaxhighlight lang="nix">
+nix.settings = {
+  substituters = [
+    "https://cache.nichi.co"
+    "https://cache.ztier.in"
+  ];
+  trusted-public-keys = [
+    "hydra.nichi.co-0:P3nkYHhmcLR3eNJgOAnHDjmQLkfqheGyhZ6GLrUVHwk="
+    "cache.ztier.link-1:3P5j2ZB9dNgFFFVkCQWT3mh0E+S3rIWtZvoql64UaXM="
+  ];
+  experimental-features = [
+    "nix-command"
+    "flakes"
+  ];
+};
+</syntaxhighlight>Known third-party binary caches with RISCV support
 * [https://github.com/misuzu/nixos-vf2/blob/master/flake.nix#L3 misuzu]
+* [https://hydra.nichi.co/ by Nick Cao]
 == NixOS Support ==