RISC-V: Difference between revisions

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Supported devices

Table legend:

Upstream (NixOS) supported devices

NixOS has no official support for riscv64-linux architecture on the nixpkgs-unstable and stable channel.

Community supported devices

Manufacturer	Board	SoC	ISA	CPU	RAM	Storage
StarFive	StarFive VisionFive	JH7100	RV64GC	2× SiFive U74 @ 1.5 GHz	8GB LPDDR4	microSD
StarFive	StarFive VisionFive 2	JH7110	RV64GC	4× SiFive U74 @ 1.5 GHz	2GB/4GB/8GB LPDDR4	microSD, eMMC, M.2 M-Key

Special Devices

It is possible to emulate a RISC-V platform with QEMU. Programs may occasionally crash on QEMU with a segmentation fault despite working on native RISC-V hardware.^[1]^[2]

Manufacturer	Board	SoC	ISA	CPU	RAM	Storage
QEMU		—	Anything QEMU supports	Anything QEMU supports	Anything QEMU supports	Anything QEMU supports

Installation

Getting the installer

SD card images (SBCs and similar platforms)

For riscv64 it is possible to download images from the community.

Build or download the image.

If the image has the extension .zst, it will need to be decompressed before writing to installation device. Use nix-shell -p zstd --run "unzstd <img-name>.img.zst" to decompress the image.

Binary cache

Example configuration snippet which can be used to add two third-party binary caches with RISCV support

nix.settings = {
  substituters = [
    "https://cache.nichi.co"
    "https://cache.ztier.in"
  ];
  trusted-public-keys = [
    "hydra.nichi.co-0:P3nkYHhmcLR3eNJgOAnHDjmQLkfqheGyhZ6GLrUVHwk="
    "cache.ztier.link-1:3P5j2ZB9dNgFFFVkCQWT3mh0E+S3rIWtZvoql64UaXM="
  ];
  experimental-features = [
    "nix-command"
    "flakes"
  ];
};

Known third-party binary caches with RISCV support

NixOS Support

All RISC-V platforms are experimental for the time being.

There is a dedicated room for the upstream effort on Matrix, matrix:r/riscv:nixos.org.

Awaiting upstream RISC-V support

Resources

Subpages

The following is a list of all sub-pages of the NixOS on RISC-V topic.

VisionFive 2

The following is a list of all sub-pages of the Meetings/RISC-V.

2023-09-10

References

[1] Nixpkgs #300550

[2] Nixpkgs #300618

[1]

[2]

@@ Line 1: / Line 1: @@
-{{Expansion}}
+{{Expansion}}<!-- TODO: write preface -->
+== Supported devices ==
-Matrix: [https://matrix.to/#/%23riscv%3Anixos.org #riscv:nixos.org]
+Table legend:
+* SoC - https://en.wikipedia.org/wiki/System_on_a_chip
+* ISA - https://en.wikipedia.org/wiki/Instruction_set_architecture
-== Meetings ==
+=== Upstream (NixOS) supported devices ===
-* [https://pad.lassul.us/NixOS-riscv64-linux-2023-09-10 2023-09-10]
-== Resources ==
+NixOS has no official support for riscv64-linux architecture on the nixpkgs-unstable and stable channel.
+<!--
+Order for the device table is:
+ * By manufacturer name, alphabetical.
+ * By release date, chronological (older first).
+-->
+<!-- TODO
+{|class="table"
+!width="2%"| Manufacturer
+!width="2%"| Board
+!width="2%"| SoC
+!width="1%"| ISA
+!width="2%"| CPU
+!width="1%"| RAM
+!width="2%"| Storage
+|-
+| —
+| —
+| —
+| —
+| —
+| —
+| —
+|}
+-->
+=== Community supported devices ===
+<!--
+Order for the device table is:
+ * By manufacturer name, alphabetical.
+ * By release date, chronological (older first).
+-->
+<div class="table">
+{|class="table"
+!width="2%"| Manufacturer
+!width="2%"| Board
+!width="2%"| SoC
+!width="1%"| ISA
+!width="2%"| CPU
+!width="2%"| RAM
+!width="2%"| Storage
+|-
+| StarFive
+| [[NixOS_on_RISCV/VisionFive|StarFive VisionFive]]
+| JH7100
+| RV64GC
+| 2× SiFive U74 @ 1.5 GHz
+| 8GB LPDDR4
+| microSD
+|-
+| StarFive
+| [[NixOS_on_RISCV/VisionFive_2|StarFive VisionFive 2]]
+| JH7110
+| RV64GC
+| 4× SiFive U74 @ 1.5 GHz
+| 2GB/4GB/8GB LPDDR4
+| microSD, eMMC, M.2 M-Key
+|}
+</div>
+==== Special Devices ====
+It is possible to emulate a RISC-V platform with QEMU. Programs may occasionally crash on QEMU with a segmentation fault despite working on native RISC-V hardware.<ref>[https://github.com/NixOS/nixpkgs/issues/300550 Nixpkgs #300550]</ref><ref>[https://github.com/NixOS/nixpkgs/issues/300618 Nixpkgs #300618]</ref>
+<div class="table">
+{|class="table"
+!width="2%"| Manufacturer
+!width="2%"| Board
+!width="2%"| SoC
+!width="2%"| ISA
+!width="2%"| CPU
+!width="2%"| RAM
+!width="2%"| Storage
+|-
+| QEMU
+| <!-- [[NixOS_on_RISCV/QEMU|QEMU]] -->
+| —
+| Anything QEMU supports
+| Anything QEMU supports
+| Anything QEMU supports
+| Anything QEMU supports
+|}
+</div>
+== Installation ==
+=== Getting the installer ===
+<!-- TODO
+==== UEFI iso ====
+-->
-* https://wiki.riscv.org/display/HOME/Language+Runtimes
+==== SD card images (SBCs and similar platforms) ====
-* https://github.com/NixOS/nixos-hardware
-== Images ==
+For <code>riscv64</code> it is possible to download images from the community.
 * [https://github.com/zhaofengli/nixos-riscv64 Hifive Unmatched]
@@ Line 19: / Line 112: @@
 * [https://github.com/ryan4yin/nixos-licheepi4a Lichee Pi 4A]
-== Binary caches ==
+Build or download the image.
+If the image has the extension <code>.zst</code>, it will need to be decompressed before writing to installation device. Use <code>nix-shell -p zstd --run "unzstd <img-name>.img.zst"</code> to decompress the image.
+<!-- TODO
+=== Installation steps ===
+-->
+== Binary cache ==
+Example configuration snippet which can be used to add two third-party binary caches with RISCV support<syntaxhighlight lang="nix">
+nix.settings = {
+  substituters = [
+    "https://cache.nichi.co"
+    "https://cache.ztier.in"
+  ];
+  trusted-public-keys = [
+    "hydra.nichi.co-0:P3nkYHhmcLR3eNJgOAnHDjmQLkfqheGyhZ6GLrUVHwk="
+    "cache.ztier.link-1:3P5j2ZB9dNgFFFVkCQWT3mh0E+S3rIWtZvoql64UaXM="
+  ];
+  experimental-features = [
+    "nix-command"
+    "flakes"
+  ];
+};
+</syntaxhighlight>Known third-party binary caches with RISCV support
 * [https://github.com/misuzu/nixos-vf2/blob/master/flake.nix#L3 misuzu]
+* [https://hydra.nichi.co/ by Nick Cao]
+== NixOS Support ==
+All RISC-V platforms are experimental for the time being.
-== Packages ==
+There is a dedicated room for the upstream effort on Matrix,
+[https://matrix.to/#/#riscv:nixos.org matrix:r/riscv:nixos.org].
 === Awaiting upstream RISC-V support ===
@@ Line 29: / Line 151: @@
 * [https://github.com/LuaJIT/LuaJIT/issues/628 LuaJIT]
 * [https://github.com/adoptium/temurin-build/issues/2726#issuecomment-1661380917 OpenJDK]
-* GHC
+* [[RISC-V/GHC| GHC]]
-** [https://gitlab.haskell.org/ghc/ghc/-/issues/16783 Main issue]
-** [https://gitlab.haskell.org/ghc/ghc/-/issues/23179 NCG]
-** [https://gitlab.haskell.org/ghc/ghc/-/commit/31e265c1df948d1bcc82d08affe995fd1d1c1438 LLVM backend]
-** '''[https://gitlab.haskell.org/ghc/ghc/-/issues/23519 Binary tarballs] (needed for bootstrap)'''
-** [https://gitlab.haskell.org/ghc/ghc/-/issues/?label_name%5B%5D=RISC-V RISC-V Label]
 * [https://bugs.kde.org/show_bug.cgi?id=468575 Valgrind]
+== Resources ==
+* https://wiki.riscv.org/display/HOME/Language+Runtimes
+* https://github.com/NixOS/nixos-hardware
+=== Subpages ===
+The following is a list of all sub-pages of the ''NixOS on RISC-V'' topic.
+{{Special:PrefixIndex/NixOS_on_RISCV/ |hideredirects=1 |stripprefix=1}}
+The following is a list of all sub-pages of the ''Meetings/RISC-V''.
+{{Special:PrefixIndex/Meetings/{{FULLPAGENAME}}/ |hideredirects=1 |stripprefix=1}}
+== References ==