RISC-V: Difference between revisions

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Mention that QEMU-run programs sometimes segfault. If anyone figures out exactly why this happens, replacing this change with an explanation would be helpful.
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== Supported devices ==
== Supported devices ==


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It is possible to emulate a RISC-V platform with QEMU. Programs may occasionally crash on QEMU with a segmentation fault despite working on native RISC-V hardware.<ref>[https://github.com/NixOS/nixpkgs/issues/300550 Nixpkgs #300550]</ref><ref>[https://github.com/NixOS/nixpkgs/issues/300618 Nixpkgs #300618]</ref>
It is possible to emulate a RISC-V platform with QEMU. Programs may occasionally crash on QEMU with a segmentation fault despite working on native RISC-V hardware.<ref>[https://github.com/NixOS/nixpkgs/issues/300550 Nixpkgs #300550]</ref><ref>[https://github.com/NixOS/nixpkgs/issues/300618 Nixpkgs #300618]</ref>


<div class="table-responsive">
<div class="table">
{|class="table"
{|class="table"
!width="2%"| Manufacturer
!width="2%"| Manufacturer
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== Binary cache ==
== Binary cache ==
 
Example configuration snippet which can be used to add two third-party binary caches with RISCV support<syntaxhighlight lang="nix">
nix.settings = {
  substituters = [
    "https://cache.nichi.co"
    "https://cache.ztier.in"
  ];
  trusted-public-keys = [
    "hydra.nichi.co-0:P3nkYHhmcLR3eNJgOAnHDjmQLkfqheGyhZ6GLrUVHwk="
    "cache.ztier.link-1:3P5j2ZB9dNgFFFVkCQWT3mh0E+S3rIWtZvoql64UaXM="
  ];
  experimental-features = [
    "nix-command"
    "flakes"
  ];
};
</syntaxhighlight>Known third-party binary caches with RISCV support
* [https://github.com/misuzu/nixos-vf2/blob/master/flake.nix#L3 misuzu]
* [https://github.com/misuzu/nixos-vf2/blob/master/flake.nix#L3 misuzu]
* [https://hydra.nichi.co/ by Nick Cao]


== NixOS Support ==
== NixOS Support ==
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* [https://github.com/adoptium/temurin-build/issues/2726#issuecomment-1661380917 OpenJDK]
* [https://github.com/adoptium/temurin-build/issues/2726#issuecomment-1661380917 OpenJDK]
* [[RISC-V/GHC| GHC]]
* [[RISC-V/GHC| GHC]]
** [https://gitlab.haskell.org/ghc/ghc/-/issues/16783 Main issue]
** [https://gitlab.haskell.org/ghc/ghc/-/issues/23179 NCG]
** [https://gitlab.haskell.org/ghc/ghc/-/commit/31e265c1df948d1bcc82d08affe995fd1d1c1438 LLVM backend]
** '''[https://gitlab.haskell.org/ghc/ghc/-/issues/23519 Binary tarballs] (needed for bootstrap)'''
** [https://gitlab.haskell.org/ghc/ghc/-/issues/?label_name%5B%5D=RISC-V RISC-V Label]
* [https://bugs.kde.org/show_bug.cgi?id=468575 Valgrind]
* [https://bugs.kde.org/show_bug.cgi?id=468575 Valgrind]


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The following is a list of all sub-pages of the ''RISC-V/Meetings''.
The following is a list of all sub-pages of the ''Meetings/RISC-V''.
 
{{Special:PrefixIndex/Meetings/{{FULLPAGENAME}}/ |hideredirects=1 |stripprefix=1}}


{{Special:PrefixIndex/{{FULLPAGENAME}}/Meetings/ |hideredirects=1 |stripprefix=1}}
== References ==

Latest revision as of 18:06, 20 December 2024

Supported devices

Table legend:

Upstream (NixOS) supported devices

NixOS has no official support for riscv64-linux architecture on the nixpkgs-unstable and stable channel.


Community supported devices

Manufacturer Board SoC ISA CPU RAM Storage
StarFive StarFive VisionFive JH7100 RV64GC 2× SiFive U74 @ 1.5 GHz 8GB LPDDR4 microSD
StarFive StarFive VisionFive 2 JH7110 RV64GC 4× SiFive U74 @ 1.5 GHz 2GB/4GB/8GB LPDDR4 microSD, eMMC, M.2 M-Key

Special Devices

It is possible to emulate a RISC-V platform with QEMU. Programs may occasionally crash on QEMU with a segmentation fault despite working on native RISC-V hardware.[1][2]

Manufacturer Board SoC ISA CPU RAM Storage
QEMU Anything QEMU supports Anything QEMU supports Anything QEMU supports Anything QEMU supports

Installation

Getting the installer

SD card images (SBCs and similar platforms)

For riscv64 it is possible to download images from the community.

Build or download the image.

If the image has the extension .zst, it will need to be decompressed before writing to installation device. Use nix-shell -p zstd --run "unzstd <img-name>.img.zst" to decompress the image.


Binary cache

Example configuration snippet which can be used to add two third-party binary caches with RISCV support

nix.settings = {
  substituters = [
    "https://cache.nichi.co"
    "https://cache.ztier.in"
  ];
  trusted-public-keys = [
    "hydra.nichi.co-0:P3nkYHhmcLR3eNJgOAnHDjmQLkfqheGyhZ6GLrUVHwk="
    "cache.ztier.link-1:3P5j2ZB9dNgFFFVkCQWT3mh0E+S3rIWtZvoql64UaXM="
  ];
  experimental-features = [
    "nix-command"
    "flakes"
  ];
};

Known third-party binary caches with RISCV support

NixOS Support

All RISC-V platforms are experimental for the time being.

There is a dedicated room for the upstream effort on Matrix, matrix:r/riscv:nixos.org.

Awaiting upstream RISC-V support

Resources

Subpages

The following is a list of all sub-pages of the NixOS on RISC-V topic.


The following is a list of all sub-pages of the Meetings/RISC-V.

References